MCCIRM Freescale Semiconductor / Motorola, MCCIRM Datasheet - Page 70

• Manufacturer Part Number: MCCIRM
• Description: MCCIRM Multi-Channel Communications Interface Reference Manual
• Manufacturer: Freescale Semiconductor / Motorola

SCI Submodule
5.7.7 SCI Receiver
Reference Manual
70
WOMC controls TXD function regardless of whether the pin is used for
SCI transmissions (TE = 1) or as a general-purpose I/O pin (TE = 0).
Clearing this bit causes TXD and RXD to function as normal CMOS
outputs. WOMC has no effect on TXD or RXD pins that are configured
as general-purpose inputs.
Each SCI receiver contains a receive serial shifter and a parallel receive
data register (RDR) located in the SCI data register (SCDR). The
receiver is double buffered: While one character is shifted into the
receive serial shift register, another character can be held in the RDR.
This double-buffered arrangement gives software some time to notice a
received character and read it before the next serial character is
finished. Without double buffering, the transmitting device would be
required to insert delays between transmitted characters to avoid a
receiver overrun.
The receiver enable (RE) bit in SCCR1 enables the receiver. The M bit
in SCCR1 determines frame size (10 or 11 bits). After a stop bit is
detected, the received data is transferred from the shifter to the SCDR,
and the receive data register full (RDRF) status flag is set. When a
character is ready to be transferred to the receive buffer but the previous
character has not yet been read, an overrun condition results. When this
occurs, data is not transferred and the overrun (OR) status flag is set to
indicate the error.
The wakeup block uses the WAKE control bit in SCCR1 to decide
whether to use address mark or the all 1s signal (idle line) to wake up
the receiver. When the selected condition is detected, the wakeup logic
clears the receiver wakeup (RWU) bit in SCCR1, waking up the receiver.
The SCSR contains two receiver-related flags that can be polled by
software or optionally cause an SCI interrupt request. The receiver
interrupt enable (RIE) control bit enables the RDRF status flag to
generate hardware interrupt requests. The idle line interrupt enable
(ILIE) control bit allows the IDLE status flag to generate SCI interrupt
requests.
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SCI Submodule
Multichannel Communication Interface — Rev. 1.0
MOTOROLA