MCCIRM Freescale Semiconductor / Motorola, MCCIRM Datasheet - Page 21

• Manufacturer Part Number: MCCIRM
• Description: MCCIRM Multi-Channel Communications Interface Reference Manual
• Manufacturer: Freescale Semiconductor / Motorola

2.3.1 Slave Select (SS)
2.3.2 SPI Serial Clock (SCK)
2.3.3 Master In/Slave Out (MISO)
2.3.4 Master Out/Slave In (MOSI)
2.4 SCI Pins
Multichannel Communication Interface — Rev. 1.0
MOTOROLA
Assertion of SS, a bidirectional signal, selects the SPI submodule for a
serial transfer when the SPI is operating in slave mode. Assertion of this
signal when the SPI is operating in master mode causes a mode fault.
SCK, a bidirectional signal, furnishes the clock from the SPI in master
mode and provides the clock to the SPI in slave mode.
MISO is a bidirectional signal that furnishes serial data input to the SPI
in master mode and provides serial data output from the SPI in slave
mode.
MOSI is a bidirectional signal that furnishes serial data output from the
SPI in master mode and serial data input to the SPI in slave mode.
Four pins are associated with the SCI: TXDA, TXDB, RXDA, and RXDB.
The state of the transmitter enable (TE) or receiver enable (RE) bit in SCI
control register 1 of each SCI submodule (SCCR1A, SCCR1B)
determines whether the associated pin is configured for SCI operation or
general-purpose I/O.
The MDDR assigns each pin as either input or output.
The WOMC bit in SCCR1A or SCCR1B determines whether the
associated RXD and TXD pins, when configured as outputs, function as
open-drain output pins or normal CMOS outputs.
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Signal Descriptions
Signal Descriptions
Reference Manual
SCI Pins
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