MCCIRM Freescale Semiconductor / Motorola, MCCIRM Datasheet - Page 45

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MCCIRM

Manufacturer Part Number
MCCIRM
Description
MCCIRM Multi-Channel Communications Interface Reference Manual
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
4.5.2 Slave Mode
Multichannel Communication Interface — Rev. 1.0
MOTOROLA
Clearing the MSTR bit in SPCR selects slave mode operation. In slave
mode, the SPI is unable to initiate serial transfers. Transfers are initiated
by an external bus master. Typically, slave mode is used on a
multimaster SPI bus. Only one device can be bus master (operate in
master mode) at any given time.
3.4 System Initialization
When using the SPI in slave mode, include these specific steps:
When SPE is set and MSTR is clear, a low state on the SS pin initiates
slave mode operation. (The SS pin is used only as an input.)
After a byte or word of data is transmitted, the SPI sets the SPIF flag. If
the SPIE bit in SPCR is set, an interrupt request is generated when SPIF
is asserted.
Transfer is synchronized with the externally generated SCK. The CPHA
and CPOL bits determine the SCK edge on which the slave MCU latches
incoming data from the MOSI pin and drives outgoing data from the
MISO pin.
1. Write to the MMCR and interrupt registers as outlined in
2. Write to the MPAR to assign these three pins to the SPI: MISO,
3. Write to the MDDR to direct the data flow on SPI pins. Configure
4. Write to the SPCR to assign values for CPHA, CPOL, SIZE, LSBF,
Freescale Semiconductor, Inc.
For More Information On This Product,
System
MOSI, and SS. MISO is used for serial data output in slave mode,
and MOSI is used for serial data input. Either or both may be
necessary, depending on the particular application. SCK is the
input serial clock. SS selects the SPI when asserted.
the SCK, MOSI, and SS pins as inputs. Configure MISO as an
output.
WOMP, and SPIE. Set the MSTR bit to select master operation.
Set the SPE bit to enable the SPI. (The BAUD field in the SPCR
of the slave device has no effect on SPI operation.)
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Initialization.
SPI Submodule
provides general initialization procedures.
Reference Manual
Operating Modes
SPI Submodule
3.4
45

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