MCCIRM Freescale Semiconductor / Motorola, MCCIRM Datasheet - Page 54

• Manufacturer Part Number: MCCIRM
• Description: MCCIRM Multi-Channel Communications Interface Reference Manual
• Manufacturer: Freescale Semiconductor / Motorola

SPI Submodule
4.12.2 SPI Status Register
Reference Manual
54
Register address: $XXXX3C
Reset:
Read:
Write:
Bit 15
SPIF WCOL
0
14
0
13
0
0
The SPI status register (SPSR) contains SPI status information. Only the
SPI can set the bits in this register. The CPU reads the register to obtain
status information.
SPIF — SPI Finished Flag
WCOL — Write Collision Bit
MODF — Mode Fault Flag
MODF
12
0
Clearing SPIF is accomplished by reading the SPSR while SPIF is set
and then writing to or reading the SPDR.
Clearing WCOL is accomplished by reading the SPSR while WCOL
is set and then either reading the SPDR prior to the SPIF bit being set
or reading or writing the SPDR after the SPIF bit is set.
Clearing MODF is accomplished by reading the SPSR while MODF is
set and then writing to the SPDR.
Freescale Semiconductor, Inc.
Figure 4-5. SPI Status Register (SPSR)
For More Information On This Product,
0 = Transfer not completed
1 = Transfer completed
0 = No write collision occurred
1 = Write collision occurred
0 = Normal operation
1 = Another SPI node requested to become the network SPI
11
0
0
master while the SPI was enabled in master mode (SS input
taken low)
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10
0
0
SPI Submodule
9
0
0
8
0
0
Multichannel Communication Interface — Rev. 1.0
0
0
7
0
0
6
5
0
0
4
0
0
3
0
0
2
0
0
MOTOROLA
1
0
0
Bit 0
0
0