MCCIRM Freescale Semiconductor / Motorola, MCCIRM Datasheet - Page 103

• Manufacturer Part Number: MCCIRM
• Description: MCCIRM Multi-Channel Communications Interface Reference Manual
• Manufacturer: Freescale Semiconductor / Motorola

B.3.8 MCCI Data Direction Register
Register address: $XXXX0B
B.3.9 SPI Control Register
Register address: $XXXX38
Multichannel Communication Interface — Rev. 1.0
MOTOROLA
Reset:
Reset:
Read:
Read:
Write:
Write:
Bit 15
Bit 15
SPIE
0
SPE WOMP MSTR CPOL CPHA LSBF SIZE
14
14
0
13
13
0
Figure B-7. MCCI Data Direction Register (MDDR)
SPIE — SPI Interrupt Enable Bit
SPE — SPI Enable Bit
12
Reserved
12
0
Figure B-8. SPI Control Register (SPCR)
These bits assign the corresponding pin, when configured for
general-purpose I/O, to be input or output.
To prevent unpredicted operation, the other SPI control fields should
be configured properly before or at the same time SPE is set.
Freescale Semiconductor, Inc.
For More Information On This Product,
0 = Input
1 = Output
0 = SPI interrupts disabled
1 = SPI interrupts enabled
0 = SPI disabled
1 = SPI enabled
11
11
0
10
Memory Map and Registers
10
Go to: www.freescale.com
1
9
9
0
8
8
0
TXDA RXDA TXDB RXDB
7
0
0
7
6
0
6
0
5
0
5
0
4
0
4
0
BAUD
Memory Map and Registers
SS
3
0
3
0
SCK MOSI MISO
Reference Manual
2
0
2
1
1
0
1
0
Bit 0
Bit 0
0
0
103