MCCIRM Freescale Semiconductor / Motorola, MCCIRM Datasheet - Page 111

• Manufacturer Part Number: MCCIRM
• Description: MCCIRM Multi-Channel Communications Interface Reference Manual
• Manufacturer: Freescale Semiconductor / Motorola

B.3.15 SCI Data Register
Multichannel Communication Interface — Rev. 1.0
MOTOROLA
Register name and address: SCI Data Register (SCDRA), $XXXX1E
Reset:
Read:
Write:
Bit 15
0
0
= Unimplemented
14
0
0
Figure B-14. SCI Data Registers (SCDRA and SCDRB)
13
0
0
SCI Data Register (SCDRB), $XXXX2F
FE — Framing Error Flag
PF — Parity Error Flag
R[8:0] — Receive[8:0] Bits
T[8:0] — Transmit[8:0] Bits
12
R8 is the MSB when the SCI system is configured for 11-bit frames
(M = 1). If used, R8 represents the address mark, an extra stop bit, or
the parity mark. When the SCI system is configured for 10-bit frames
(M = 0), this bit has no meaning or effect. R7 is then the MSB before
the stop bit and may represent either data, a parity bit, a second stop
bit, or an address mark. R[6:0] represent data bits.
T8 is the MSB when the SCI system is configured for 11-bit frames
(M = 1). When used, T8 represents either the address mark, an extra
stop bit, or the parity mark. When the SCI system is configured for
10-bit frames (M = 0), this bit has no meaning or effect. T7 is then the
MSB and may represent either data, a parity bit, an extra stop bit, or
an address mark. T[6:0] represent data bits.
Freescale Semiconductor, Inc.
0
0
For More Information On This Product,
0 = No framing error on the received data
1 = Framing error or break occurred on the received data.
0 = No parity error on the received data
1 = Parity error occurred on the received data.
11
0
0
U = Unaffected
Memory Map and Registers
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10
0
0
9
0
0
R8/T8 R7/T7 R6/T6 R5/T5 R4/T4 R3/T3 R2/T2 R1/T1 R0/T0
U
8
U
7
U
6
U
5
U
4
Memory Map and Registers
U
3
Reference Manual
U
2
U
1
Bit 0
U
111