MCCIRM Freescale Semiconductor / Motorola, MCCIRM Datasheet - Page 67

no-image

MCCIRM

Manufacturer Part Number
MCCIRM
Description
MCCIRM Multi-Channel Communications Interface Reference Manual
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
5.7.3 Disabling the SCI Transmitter
5.7.4 Break Characters
Multichannel Communication Interface — Rev. 1.0
MOTOROLA
One interrupt vector is associated with each SCI subsystem; therefore,
the interrupt service routine must begin by reading the SCSR to
determine which interrupt or interrupts caused the service routine to be
called. Possible interrupt sources include the two transmitter sources
previously discussed and two receiver-related sources.
After loading the last byte into the TDR and receiving the interrupt from
TDRE in the SCSR (indicating that the data has transferred into the
transmit serial shifter), clear TE to disable the transmitter. When TE is
cleared, the transmitter is disabled after all pending idle, data, and break
frames are transmitted. The TC flag is set, and the TXD pin reverts to
use for general-purpose I/O. Buffered data is not transmitted after TE is
cleared. To avoid terminating transmission with data in the buffer, do not
clear TE until TDRE is set.
If TE remains set after all pending idle, data, and break frames are
shifted out, TDRE and TC are set and TXD is held at logic level 1.
Some serial communication systems require a mark on the TXD pin
even when the transmitter is disabled. In this case, configure the TXD
pin as an output by writing to the MDDR, and then write a 1 to PMC7 (for
SCIA) or PMC5 (for SCIB) in PORTMC, the data register for the MCCI
general-purpose I/O port. When the transmitter releases control of the
TXD pin, it reverts to driving a logic 1 output.
bit in SCCR1). Break characters have no start or stop bits. As long as
the SBK bit in SCCR1 is set, break characters are queued and sent: The
TXD line remains continuously at 0. When SBK is cleared, at least one
bit time of logic 1 appears on the TXD line as soon as the last break
character is finished. This high bit time ensures that a receiver can
detect the falling edge at the beginning of the start bit for the next data
character.
Break characters are streams of 10 or 11 logic 0s (depending on the M
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
SCI Submodule
Reference Manual
SCI Submodule
SCI Transmitter
67

Related parts for MCCIRM