MCCIRM Freescale Semiconductor / Motorola, MCCIRM Datasheet - Page 69

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MCCIRM

Manufacturer Part Number
MCCIRM
Description
MCCIRM Multi-Channel Communications Interface Reference Manual
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
5.7.6 Wired-OR Open-Drain Outputs
Multichannel Communication Interface — Rev. 1.0
MOTOROLA
when it sees a full character time of logic 1. During a message, there
must never be any gap between characters within a message because
even a single bit time of idle can trigger wakeup if the previous character
was $FF. The queued idle function allows exactly one character time of
idle to be inserted into the data stream to maintain maximum efficiency
and data throughput. Before queued idle was available, software had to
avoid writing to the TDR for two or more character times after seeing
TDRE go high, which caused the TXD line to go idle for enough time to
trigger RWU.
To queue an idle character, write the last character to the TDR and wait
for TDRE to become set. (This indicates that the last character has
transferred to the transmit shifter to be transmitted serially.) Write 0 and
then 1 to TE. Since the last character is still being transmitted, the
transmitter will not give up control of the TXD pin, and the character
being transmitted is undisturbed. The 0-to-1 transition of TE queues the
idle character to be sent as soon as the transmit shifter becomes
available. As soon as TE is written back to 1, the first character of the
next message can be written to the TDR. In this unusual case, the
transmit queue can be three characters deep: the last data character of
the previous message still transmitting, the queued idle character, and
the first character of the next message in the parallel TDR.
Since an idle character is queued at the rising edge of the setting of the
TE bit, exactly one idle character results from the queuing procedure.
There is never any possibility of a second idle character being produced
due to uncertainty about the relationship between the software and the
internal baud-rate clock (as there is with queued break characters).
When more than one transmitter is used on the same SCI bus, set the
WOMC bit in SCCR1 to select wired-OR open-drain operation for the
TXD pin. The WOMC bit also controls the RXD pin when it is configured
as an output. Use external pullup resistors on these pins for wired-OR
operation.
Freescale Semiconductor, Inc.
For More Information On This Product,
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SCI Submodule
Reference Manual
SCI Submodule
SCI Transmitter
69

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