MCCIRM Freescale Semiconductor / Motorola, MCCIRM Datasheet - Page 106

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MCCIRM

Manufacturer Part Number
MCCIRM
Description
MCCIRM Multi-Channel Communications Interface Reference Manual
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
Memory Map and Registers
B.3.11 SPI Data Register
Register address: $XXXX3E
Reference Manual
106
Reset:
Read:
Write:
Bit 15
14
13
UPPB — Upper Byte Bit
LOWB — Lower Byte Bit
12
UPPB
In a 16-bit transfer (SIZE = 1), the address of the upper byte is used
to access the most significant eight bits of the data. Bit 15 of the
SPDR is the MSB of the 16-bit data.
In an 8-bit transfer (SIZE = 0), the data is accessed at the address of
the lower byte. The MSB in an 8-bit transfer is bit 7 of the SPDR. In a
16-bit transfer (SIZE = 1), the lower byte holds the least significant
eight bits of the data.
Freescale Semiconductor, Inc.
Figure B-10. SPI Data Register (SPDR)
For More Information On This Product,
11
Memory Map and Registers
10
Go to: www.freescale.com
Reset state is unknown
9
8
7
Multichannel Communication Interface — Rev. 1.0
6
5
4
LOWB
3
2
MOTOROLA
1
Bit 0

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