MCCIRM Freescale Semiconductor / Motorola, MCCIRM Datasheet - Page 108

no-image

MCCIRM

Manufacturer Part Number
MCCIRM
Description
MCCIRM Multi-Channel Communications Interface Reference Manual
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
Memory Map and Registers
B.3.13 SCI Control Register 1
Reference Manual
108
Register name and address: SCI Control Register 1 (SCCR1A), $XXXX1A
Reset:
Read:
Write:
Bit 15
0
LOOPS WOMC
= Unimplemented
14
0
Figure B-12. SCI Control Register 1 (SCCR1A and SCCR1B)
13
0
SCI Control Register 1 (SCCR1B), $XXXX2A
Bit 15 — Not Implemented
LOOPS — Loop Mode Bit
WOMC — Wired-OR Mode for SCI Pins
ILT — Idle-Line Detect Type Bit
PT — Parity Type Bit
PE — Parity Enable Bit
M — Mode Select Bit
ILT
12
The LOOPS bit in SCCR1 controls a feedback path on the data serial
shifter. When LOOPS is set, SCI transmitter output is fed back into the
receive serial shifter. TXD is asserted (idle line). Both transmitter and
receiver must be enabled prior to entering loop mode.
Freescale Semiconductor, Inc.
0
For More Information On This Product,
0 = Normal SCI operation, no looping, feedback path disabled
1 = Test SCI operation, looping, feedback path enabled
0 = If configured as an output, TXD is a normal CMOS output.
1 = If configured as an output, TXD is an open-drain output.
0 = Short idle-line detect (start count on first 1)
1 = Long idle-line detect (start count on first 1 after stop bit(s))
0 = Even parity
1 = Odd parity
0 = SCI parity disabled
1 = SCI parity enabled
0 = 10-bit frame
1 = 11-bit frame
PT
11
0
Memory Map and Registers
Go to: www.freescale.com
PE
10
0
M
0
9
WAKE TIE
8
0
Multichannel Communication Interface — Rev. 1.0
7
0
TCIE
6
0
RIE
0
5
ILIE
4
0
TE
3
0
RE
0
2
MOTOROLA
RWU SBK
0
1
Bit 0
0

Related parts for MCCIRM