MCCIRM Freescale Semiconductor / Motorola, MCCIRM Datasheet - Page 99

• Manufacturer Part Number: MCCIRM
• Description: MCCIRM Multi-Channel Communications Interface Reference Manual
• Manufacturer: Freescale Semiconductor / Motorola

B.3 MCCI Registers
B.3.1 MCCI Module Configuration Register
Register address: $XXXX00
Multichannel Communication Interface — Rev. 1.0
MOTOROLA
Reset:
Read:
Write:
STOP
Bit 15
0
14
0
0
Figure B-1. MCCI Module Configuration Register (MMCR)
13
0
0
This section summarizes the MCCI registers.
STOP — Stop Enable Bit
MMCR[14:8] — Not Implemented
SUPV — Supervisor/Unrestricted Bit
MMCR[6:4] — Not Implemented
IARB — Interrupt Arbitration Number Bit
12
0
0
SUPV defines the assignable MCCI registers as either
supervisor-only access or user access.
The value in this field is used to arbitrate for the IMB when two or more
modules generate simultaneous interrupts at the same priority level.
The IARB field should be initialized by system software to a value
from $F (highest priority) through $1 (lowest priority).
Freescale Semiconductor, Inc.
For More Information On This Product,
0 = Normal MCCI clock operation
1 = MCCI clock operation stopped
0 = Unrestricted access
1 = Supervisor access
11
0
0
10
0
0
Memory Map and Registers
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9
0
0
8
0
0
SUPV
7
0
6
0
0
5
0
0
4
0
0
Memory Map and Registers
3
0
Reference Manual
2
0
IARB
1
0
Bit 0
0
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