MCCIRM Freescale Semiconductor / Motorola, MCCIRM Datasheet - Page 28

• Manufacturer Part Number: MCCIRM
• Description: MCCIRM Multi-Channel Communications Interface Reference Manual
• Manufacturer: Freescale Semiconductor / Motorola

Configuration and Control
Reference Manual
28
When SUPV is set, the CPU can access MCCI registers only when
operating at the supervisor privilege level. When SUPV is clear, the CPU
can access all MCCI registers from the user privilege level except the
global registers mentioned earlier.
Attempting to access a supervisor-only register from the user privilege
level causes the MCCI to respond as if an unimplemented register is
being accessed. Writes have no effect and reads return 0s.
The S bit in the CPU status register determines the privilege level at
which the CPU is operating (0 = user level and 1 = supervisor level). The
SUPV bit in the MMCR can be set or cleared only when the CPU is
operating at the supervisor privilege level (S = 1).
Refer to the appropriate CPU manual for more information on privilege
levels.
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Configuration and Control
Multichannel Communication Interface — Rev. 1.0
MOTOROLA