MCCIRM Freescale Semiconductor / Motorola, MCCIRM Datasheet - Page 85

• Manufacturer Part Number: MCCIRM
• Description: MCCIRM Multi-Channel Communications Interface Reference Manual
• Manufacturer: Freescale Semiconductor / Motorola

5.8.2 SCI Control Register 1
Multichannel Communication Interface — Rev. 1.0
MOTOROLA
Register name and address: SCI Control Register 1 (SCCR1A), $XXXX1A
Reset:
Read:
Write:
Bit 15
0
LOOPS WOMC
= Unimplemented
14
0
Figure 5-11. SCI Control Register 1 (SCCR1A and SCCR1B)
13
0
SCI Control Register 1 (SCCR1B), $XXXX2A
SCCR1 contains a number of SCI configuration parameters, including
transmitter and receiver enable bits, interrupt enable bits, and operating
mode enable bits. The CPU can read and write this register at any time.
The SCI can modify the RWU bit under certain circumstances.
Bit 15 — Not Implemented
LOOPS — Loop Mode Bit
WOMC — Wired-OR Mode for SCI Pins
ILT — Idle-Line Detect Type Bit
PT — Parity Type Bit
ILT
12
The LOOPS bit in SCCR1 controls a feedback path on the data serial
shifter. When LOOPS is set, SCI transmitter output is fed back into the
receive serial shifter. TXD is asserted (idle line). Both transmitter and
receiver must be enabled prior to entering loop mode.
Freescale Semiconductor, Inc.
0
For More Information On This Product,
0 = Normal SCI operation, no looping, feedback path disabled
1 = Test SCI operation, looping, feedback path enabled
0 = If configured as an output, TXD is a normal CMOS output.
1 = If configured as an output, TXD is an open-drain output.
0 = Short idle-line detect (start count on first 1)
1 = Long idle-line detect (start count on first 1 after stop bit(s))
0 = Even parity
1 = Odd parity
PT
11
0
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PE
10
0
SCI Submodule
M
9
0
WAKE TIE
0
8
0
7
TCIE
6
0
RIE
5
0
ILIE
0
4
TE
3
0
Reference Manual
RE
0
2
SCI Submodule
SCI Registers
RWU SBK
1
0
Bit 0
0
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