MCCIRM Freescale Semiconductor / Motorola, MCCIRM Datasheet - Page 102

• Manufacturer Part Number: MCCIRM
• Description: MCCIRM Multi-Channel Communications Interface Reference Manual
• Manufacturer: Freescale Semiconductor / Motorola

Memory Map and Registers
B.3.6 MCI Port Data Registers
B.3.7 MCCI Pin Assignment Register
Reference Manual
102
Register address: $XXXX09
Register name and address: MCCI Port Data Register (PORTMC), $XXXX0C
Reset:
Reset:
Read:
Write:
Read:
Write:
Bit 15
Bit 15
14
14
Figure B-5. MCCI Port Data Registers (PORTMC and PORTMCP)
13
13
Figure B-6. MCCI Pin Assignment Register (MPAR)
MCCI Port Pin State Register (PORTMCP), $XXXX0E
Reserved
12
Two registers are associated with port MCCI, the MCCI general-purpose
input/output (I/O) port. Writes to PORTMC, the MCCI port data register,
are stored in the internal data latch. If any bit of PORTMC is configured
as discrete output, the value latched for that bit is driven onto the pin.
Reads of PORTMC return the value of the pin only if the pin is configured
as a discrete input. Otherwise, the value read is the value of the latch.
Reads of PORTMCP, the MCCI pin state register, always return the
state of the pins regardless of whether the pins are configured as input
or output. Writes to PORTMCP have no effect.
MPAR[7:4] and MPAR2 — Not implemented
SS — Slave Select Bit
MOSI — Master Out/Slave In Bit
MISO — Master In/Slave Out Bit
12
Reserved
These bits determine whether the associated MCCI port pin functions
as a general-purpose I/O pin or is assigned to the SPI submodule.
Freescale Semiconductor, Inc.
11
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11
10
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Memory Map and Registers
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9
9
8
(TXDA)
PMC
8
0
7
(RXDA)
PMC6
7
0
0
Multichannel Communication Interface — Rev. 1.0
6
0
6
0
0
(TXDB)
PMC5
0
5
5
0
0
(RXDB)
PMC4
4
0
4
0
0
PMC3
(SS)
3
0
SS
3
0
PMC2
(SCK)
2
0
2
0
0
(MOSI)
PMC1
MOTOROLA
MOSI MISO
1
0
1
0
(MISO)
PMC0
Bit 0
Bit 0
0
0