MCCIRM Freescale Semiconductor / Motorola, MCCIRM Datasheet - Page 55

• Manufacturer Part Number: MCCIRM
• Description: MCCIRM Multi-Channel Communications Interface Reference Manual
• Manufacturer: Freescale Semiconductor / Motorola

4.12.3 SPI Data Register
Register address: $XXXX3E
Multichannel Communication Interface — Rev. 1.0
MOTOROLA
Reset:
Read:
Write:
Bit 15
14
13
The SPI data register (SPDR) is used to transmit and receive data on the
serial bus. A write to this register in the master device initiates
transmission or reception of another byte or word. After a byte or word
of data is transmitted, the SPIF status bit is set in both the master and
slave devices.
A read of the SPDR actually reads a buffer. If the first SPIF is not cleared
by the time a second transfer of data from the shift register to the read
buffer is initiated, an overrun condition occurs. In cases of overrun, the
byte or word causing the overrun is lost.
A write to the SPDR is not buffered and places data directly into the shift
register for transmission.
UPPB — Upper Byte Bit
LOWB — Lower Byte Bit
12
UPPB
In a 16-bit transfer (SIZE = 1), the address of the upper byte is used
to access the most significant eight bits of the data. Bit 15 of the
SPDR is the MSB of the 16-bit data.
In an 8-bit transfer (SIZE = 0), the data is accessed at the address of
the lower byte. The MSB in an 8-bit transfer is bit 7 of the SPDR. In a
16-bit transfer (SIZE = 1), the lower byte holds the least significant
eight bits of the data.
Freescale Semiconductor, Inc.
Figure 4-6. SPI Data Register (SPDR)
For More Information On This Product,
11
10
Go to: www.freescale.com
SPI Submodule
Reset state is unknown
9
8
7
6
5
4
LOWB
3
Reference Manual
2
SPI Submodule
SPI Registers
1
Bit 0
55