cx28365 Mindspeed Technologies, cx28365 Datasheet - Page 127

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cx28365

Manufacturer Part Number
cx28365
Description
X12, X6, X4 T3/e3 Framer And Atm Cell Transmission Convergence Sublayer Processor
Manufacturer
Mindspeed Technologies
Datasheet
CX28365/6/4 Data Sheet
0x17—TXIDL4 (Transmit Idle Cell Header Control Register 4)
TxIdl4[7:4]
TxIdl4[3:1]
TxIdl4[0]
500028C
TxIdl4[7]
7
TxIdl4[6]
VCI bits
Payload Type Indicator bits
Cell Loss Priority bit
6
The TXIDL4 register contains the fourth byte of the Transmit Idle Cell Header (see
0x14—TXIDL1). These bits hold the Transmit Idle Cell Header values for Octet 4 of
the outgoing cell.
Default after reset: 01
Preliminary Information/Mindspeed Proprietary and Confidential
TxIdl4[5]
5
Mindspeed Technologies™
TxIdl4[4]
4
TxIdl4[3]
3
TxIdl4[2]
2
TxIdl4[1]
1
TxIdl4[0]
0
Registers
3
-
17

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