cx28365 Mindspeed Technologies, cx28365 Datasheet - Page 171
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cx28365
Manufacturer Part Number
cx28365
Description
X12, X6, X4 T3/e3 Framer And Atm Cell Transmission Convergence Sublayer Processor
Manufacturer
Mindspeed Technologies
Datasheet
1.CX28365.pdf
(228 pages)
- Current page: 171 of 228
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CX28365/6/4 Data Sheet
ParErr
FrmErrM
FrmErrF
0x35—CR20 (Error Insertion2 Control Register)
LCVIllSub
LCVBPV
500028C
—
7
Parity Error Insertion Control—Causes insertion of a parity error at the next opportunity.
In DS3 mode, the error means transmission of an incorrect value in the two P-bits.
In E3-G.832 mode, the error means transmission of a single incorrect bit in BIP-8 field (EM
byte).
Frame Error in M-Bit Insertion Control—Causes insertion of a single error (inversion) in one
M-bit at the next opportunity. Valid only in DS3 mode.
Frame Error in F/FAS/FA Insertion Control—Causes insertion of a single frame error at the
next opportunity.
In DS3 mode, causes inversion of a single F-bit.
In E3-G.751 mode, causes inversion of a single bit in the next FAS field.
In E3-G.832 mode, causes inversion of a single bit in the next FA field.
LCV Illegal Substitution Insertion Control—Causes insertion of an illegal substitution at the
next opportunity. Illegal substitution is defined as an opposite polarity substitution at the next
B3ZS/HDB3 substitution. This means that a B0V/B00V pattern is replaced with a 00V/000V
pattern or vice versa.
LCV Bipolar Violation Error Insertion Control—Causes insertion of a bipolar violation at the
next opportunity. A bipolar violation is defined as a second pulse with the same polarity as the
previous one.
—
6
Default after reset: 00
Direction: Read/Write
Modification: Dynamic
Preliminary Information/Mindspeed Proprietary and Confidential
—
5
Mindspeed Technologies™
—
4
—
3
—
2
LCVIllSub
1
LCVBPV
0
Registers
3
-
61
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