cx28365 Mindspeed Technologies, cx28365 Datasheet - Page 45

• Manufacturer Part Number: cx28365
• Description: X12, X6, X4 T3/e3 Framer And Atm Cell Transmission Convergence Sublayer Processor
• Manufacturer: Mindspeed Technologies

CX28365/6/4 Data Sheet
Figure 2-7. E3-G.751 System Transmit Timing (TxSYNC Indicates Frame Start)
Figure 2-8. E3-G.751 System Transmit Timing (TxSYNC Indicates Overhead Bits)
500028C
TxGCKO(inv)
TxGCKO(inv)
TxGCKO
TxSYNC
TxGCKO
TxSYNC
TxDATI
TxCKI
TxDATI
TxCKI
During E3-G.751 mode of operation, TxCKI pin is connected to a 34.368 MHz clock.
Figure 2-7
illustrates the TxGCKO clock behavior both in normal and in inverted mode. In this
example, TxGCKO is gapped only during FAS, A, N-bits, and Stuff Opportunity bits,
and supplies clock pulses during the payload and Justification Control bits (C
C
In
during all Opportunity bits and high during all data bits.
In the E3-G.832 mode, TxCKI pin is connected to a 34.368 MHz clock. In
TxSYNC indicates frame start synchronization.
j
3 where
Figure
Preliminary Information/Mindspeed Proprietary and Confidential
Payload
Payload
2-8, TxSYNC is configured as an overhead indication signal and is low
j
illustrates TxSYNC as a frame start synchronization indication and
= 1 to 4).
Mindspeed Technologies™
10 FAS bits
10 FAS bits
High during 385 bits
Low during 12 bits
A bit
A bit
N bit
N bit
372 Payload
372 Payload
bits
bits
C11
C11
Low during 4 C1j bits
C12
C12
C13
C13
Functional Description
Figure
j
1, C
500028_020
500028_021
2-9,
j
2,
2
-
7