cx28365 Mindspeed Technologies, cx28365 Datasheet - Page 24

• Manufacturer Part Number: cx28365
• Description: X12, X6, X4 T3/e3 Framer And Atm Cell Transmission Convergence Sublayer Processor
• Manufacturer: Mindspeed Technologies

Product Description
Table 1-1. Hardware Signal Definition, Microprocessor Interface (2 of 2)
1-10
MAddr[13]
MAddr[12]
MAddr[11]
MAddr[10]
MAddr[9]
MAddr[8]
MAddr[7]
MAddr[6]
MAddr[5]
MAddr[4]
MAddr[3]
MAddr[2]
MAddr[1]
MAddr[0]
MINTR*
8KHZIn
OneSecIn
OneSecOut
Label
Pin
Microprocessor
Address Bus
(LSB)
Interrupt Request
8 kHz Input
One-Second Input
One-Second Output
Signal
Name
Preliminary Information/Mindspeed Proprietary and Confidential
CX28365
Pin#
M4
M3
H2
K4
K3
K2
N4
N3
P4
A5
A7
A6
J3
J2
L4
L3
L2
E2
Mindspeed Technologies™
CX28366
Pin#
M4
M3
H2
K4
K3
L4
K2
L3
L2
N4
N3
P4
E2
A5
A7
A6
J3
J2
CX28364
Pin#
M4
M3
H2
N4
N3
K4
K3
L4
K2
L3
L2
P4
E2
A5
A7
A6
J3
J2
O
I/O
P
O
I
I
I
/Z
14-bit input bus used to identify a register
for subsequent read/write data transfer
cycle.
Open drain active low output signifies one
or more pending interrupt requests.
MINTR* goes to high impedance state after
processor has serviced all pending
interrupt requests.
Provides timing control for PLCP framing
and can be used as the timing source to
generate a one-second timer. Schmitt
trigger input.
Rising edge controls or marks one-second
interval used for counter latching. This pin
is internally pulled low.
Rising edge indicates start of each one-
second interval. It is derived from the 8 kHz
input, (pulse width is one clock period).
Definition
CX28365/6/4 Data Sheet
500028C