R5S72611 RENESAS [Renesas Technology Corp], R5S72611 Datasheet - Page 453
R5S72611
Manufacturer Part Number
R5S72611
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.R5S72611.pdf
(1348 pages)
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Notes: 1. Writing 0 to this bit after reading it as 1 clears the flag and is the only allowed way.
Bit
0
2. When writing to the timer status register (TSR), write 0 to the bit to be cleared after
Bit Name
TGFA
reading 1. Write 1 to other bits. But 1 is not actually written and the previous value is
held.
Initial
Value
0
R/W
R/(W)*
1
Description
Input Capture/Output Compare Flag A
Status flag that indicates the occurrence of TGRA input
capture or compare match. Only 0 can be written, for
flag clearing.
[Setting conditions]
•
•
[Clearing conditions]
•
•
When TCNT = TGRA and TGRA is functioning as
output compare register
When TCNT value is transferred to TGRA by input
capture signal and TGRA is functioning as input
capture register
When DMAC is activated by TGIA interrupt
When 0 is written to TGFA after reading
TGFA = 1*
Section 12 Multi-Function Timer Pulse Unit 2 (MTU2)
2
Rev. 2.00 Sep. 07, 2007 Page 421 of 1312
REJ09B0320-0200
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