R5S72611 RENESAS [Renesas Technology Corp], R5S72611 Datasheet - Page 974

• Manufacturer Part Number: R5S72611
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 20 IEBus
the wait state. In this case, the IEB waits for data for the maximum number of receive bytes + one
byte. Then, if data for the maximum number of receive bytes + one byte is not received, a receive
timing error is detected and the RXERTME flag is set. In this case, the RXEDLE flag is not set.
The RXEDLE flag is set when data for the maximum number of receive bytes + one byte is
received.
The IEB also waits for data for the maximum number of receive bytes + one byte, when the
maximum number of receive bytes have been received but the parity error is not cleared. If data
for the maximum number of receive bytes + one byte is not received, the RXERTME flag is set. In
this case, the RXEPE flag is not set. The RXEPE flag is set when data for the maximum number
of receive bytes + one byte is received.
Figure 20.19 shows the operation timing when the reception has not been completed within the
maximum number of receive bytes.
Rev. 2.00 Sep. 07, 2007 Page 942 of 1312
REJ09B0320-0200
Figure 20.19 Operation Timing when Reception has not been Completed within Maximum
IERSR
IERSR
IERSR
RXERTME
RXEDLE
RXEPE
TM
Controller (IEB) [R5S72612] [R5S72613]
HD
MA
Number of Receive Bytes
SA
CT
Slave reception
DL
D1
Dn + 1 is not received
HD: Header
MA: Master address field
SA: Slave address field
CT: Control field
DL: Message length field
Dn: Data field (n = Max. no. of transfer bytes)
D2
Dn + 1 is received
Dn + 1 is received
Dn-1
Dn
Dn+1