R5S72611 RENESAS [Renesas Technology Corp], R5S72611 Datasheet - Page 87

• Manufacturer Part Number: R5S72611
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

2.4.4
Table 2.13 Logic Operation Instructions
Instruction
AND
AND
AND.B
NOT
OR
OR
OR.B
TAS.B
TST
TST
TST.B
XOR
XOR
XOR.B
Rm,Rn
#imm,R0
#imm,@(R0,GBR)
Rm,Rn
Rm,Rn
#imm,R0
#imm,@(R0,GBR)
@Rn
Rm,Rn
#imm,R0
#imm,@(R0,GBR)
Rm,Rn
#imm,R0
#imm,@(R0,GBR)
Logic Operation Instructions
Instruction Code
0010nnnnmmmm1001
11001001iiiiiiii
11001101iiiiiiii
0110nnnnmmmm0111
0010nnnnmmmm1011
11001011iiiiiiii
11001111iiiiiiii
0100nnnn00011011
0010nnnnmmmm1000
11001000iiiiiiii
11001100iiiiiiii
0010nnnnmmmm1010
11001010iiiiiiii
11001110iiiiiiii
Operation
Rn & Rm → Rn
R0 & imm → R0
(R0 + GBR) & imm →
(R0 + GBR)
~Rm → Rn
Rn | Rm → Rn
R0 | imm → R0
(R0 + GBR) | imm →
(R0 + GBR)
When (Rn) is 0, 1 → T
Otherwise, 0 → T,
1 → MSB of(Rn)
Rn & Rm
When the result is 0, 1 → T
Otherwise, 0 → T
R0 & imm
When the result is 0, 1 → T
Otherwise, 0 → T
(R0 + GBR) & imm
When the result is 0, 1 → T
Otherwise, 0 → T
Rn ^ Rm → Rn
R0 ^ imm → R0
(R0 + GBR) ^ imm →
(R0 + GBR)
Rev. 2.00 Sep. 07, 2007 Page 55 of 1312
Execu-
tion
Cycles
1
1
3
1
1
1
3
3
1
1
3
1
1
3
T Bit







Test
result
Test
result
Test
result
Test
result



SH2,
SH2E SH4
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
REJ09B0320-0200
Section 2 CPU
Compatibility
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
SH-2A
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes