R5S72611 RENESAS [Renesas Technology Corp], R5S72611 Datasheet - Page 948
R5S72611
Manufacturer Part Number
R5S72611
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.R5S72611.pdf
(1348 pages)
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Section 20 IEBus
Note:
Rev. 2.00 Sep. 07, 2007 Page 916 of 1312
REJ09B0320-0200
Bit
0
*
Bit Name
TXEACK
only 1 can be written to clear the flag.
TM
Controller (IEB) [R5S72612] [R5S72613]
Initial
Value
0
R/W
R/(W)*
Description
Acknowledge Bit Status
Indicates the data received in the acknowledge bit of
the data field.
•
•
Note: This flag is invalid in broadcast communications.
[Setting condition]
•
[Clearing condition]
•
Acknowledge bit other than in the data field
The IEB terminates the transmission and enters the
wait state if a NAK is received. In this case, this bit
is set to 1.
Acknowledge bit in the data field
The IEB retransmits data up to the maximum
number of bytes defined by the communications
mode until an ACK is received from the receive unit
if a NAK is received from the receive unit during
data field transmission. In this case, when an ACK
is received from the receive unit during
retransmission, this flag is not set and transmission
will be continued. When transmission is terminated
without receiving an ACK, this flag is set to 1.
When the acknowledge bit of 1 (NAK) is detected
When 1 is written
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