R5S72611 RENESAS [Renesas Technology Corp], R5S72611 Datasheet - Page 960

• Manufacturer Part Number: R5S72611
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 20 IEBus
20.4
20.4.1
Figure 20.6 shows the relationship between the transfer format and each register during the IEBus
data transmission.
Rev. 2.00 Sep. 07, 2007 Page 928 of 1312
REJ09B0320-0200
[In master transmission]
Communications frame
Register
[In slave transmission]
Communications frame
Register
Notes:
Data Format
Transmission Format
1.
2.
3.
TM
Controller (IEB) [R5S72612] [R5S72613]
In slave transmission, the received master address is not saved. If the unit is locked,
address comparison performed.
The received slave address is compared with IEAR1 and IEAR2, and if these addresses
match, operation continues.
In slave transmission, the received control bits are not saved. The received control bits
are decoded to decide the subsequent operation.
Master address
Master address
Figure 20.6 Relationship between Transfer Format
and Each Register during IEBus Data Transmission
IEAR1, IEAR2
(*1)
IEAR1, IEAR2
Slave address
Slave address
IESA1, IESA2
(*2)
Control bits
Control bits
IEMCR
(*3)
Message length bits
Message length bits
IETBFL
IETBFL
IETB001 to IETB128
IETB001 to IETB128
Data bits
Data bits