R5S72611 RENESAS [Renesas Technology Corp], R5S72611 Datasheet - Page 55
R5S72611
Manufacturer Part Number
R5S72611
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.R5S72611.pdf
(1348 pages)
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2.1
The register set consists of sixteen 32-bit general registers, four 32-bit control registers, and four
32-bit system registers.
2.1.1
Figure 2.1 shows the general registers.
The sixteen 32-bit general registers are numbered R0 to R15. General registers are used for data
processing and address calculation. R0 is also used as an index register. Several instructions have
R0 fixed as their only usable register. R15 is used as the hardware stack pointer (SP). Saving and
restoring the status register (SR) and program counter (PC) in exception handling is accomplished
by referencing the stack using R15.
Notes: 1. R0 functions as an index register in the indexed register indirect addressing mode and indexed GBR
2. R15 functions as a hardware stack pointer (SP) during exception processing.
Register Configuration
General Registers
indirect addressing mode. In some instructions, R0 functions as a fixed source register or destination register.
31
Figure 2.1 General Registers
R15, SP (hardware stack pointer)*
Section 2 CPU
R0*
R10
R11
R12
R13
R14
R1
R2
R3
R4
R5
R6
R7
R8
R9
1
Rev. 2.00 Sep. 07, 2007 Page 23 of 1312
2
0
REJ09B0320-0200
Section 2 CPU
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