R5S72611 RENESAS [Renesas Technology Corp], R5S72611 Datasheet - Page 930

• Manufacturer Part Number: R5S72611
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 20 IEBus
Notes: 1. Do not execute this command in slave communications.
Rev. 2.00 Sep. 07, 2007 Page 898 of 1312
REJ09B0320-0200
Bit
2 to 0
2. This command is valid during master communications (MRQ = 1). In other states, this
3.
4.
Bit Name
CMD
command issuance is ignored. If this command is issued in master communications, the
communications controller immediately enters the wait state. At this time, the issued
master transmission request ends (MRQ = 0).
This command is valid during slave communications (SRQ = 1). In other states, this
command issuance is ignored. Once this command is issued in slave transmission, the
SRQ flag is 0 before slave transmission. Therefore, a transmit request from the master
is not responded to. If a transmit request is issued during slave transmission, the
transmission stops and the wait state is entered (SRQ = 0).
Undefined bits. Issuing this command does not affect operation.
TM
Controller (IEB) [R5S72612] [R5S72613]
Initial
Value
000
R/W
W
Description
Command Bits
These bits issue a command to control IEB
communications. When the CMX flag in IEFLG is set
after the command issuance, the command is indicated
to be in execution. When the CMX flag becomes 0, the
operation state is entered.
000: No operation. Operation is not affected.
001: Unlock (required from other units)*
010: Requires communications as the master
011: Stops master communications*
100: Undefined bits*
101: Requires data transfer from the slave
110: Stops data transfer from the slave*
111: Undefined bits*
4
4
2
1
3