R5S72611 RENESAS [Renesas Technology Corp], R5S72611 Datasheet - Page 663

• Manufacturer Part Number: R5S72611
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

14.3.4
The watchdog timer counter (WTCNT), watchdog timer control/status register (WTCSR), and
watchdog reset control/status register (WRCSR) are more difficult to write to than other registers.
The procedures for reading or writing to these registers are given below.
(1)
These registers must be written by a word transfer instruction. They cannot be written by a byte or
longword transfer instruction.
When writing to WTCNT, set the upper byte to H'5A and transfer the lower byte as the write data,
as shown in figure 14.2. When writing to WTCSR, set the upper byte to H'A5 and transfer the
lower byte as the write data. This transfer procedure writes the lower byte data to WTCNT or
WTCSR.
Bit
5
4 to 0
WTCNT write
WTCSR write
Writing to WTCNT and WTCSR
Address: H'FFFE0002
Address: H'FFFE0000
Notes on Register Access
Bit Name
RSTS

Figure 14.2 Writing to WTCNT and WTCSR
Initial
Value
0
All 1
15
15
R/W
R/W
R
H'5A
H'A5
Description
Reset Select
Selects the type of reset when the WTCNT overflows
in watchdog timer mode. In interval timer mode, this
setting is ignored.
0: Power-on reset
1: Manual reset
Reserved
These bits are always read as 1. The write value
should always be 1.
8
8
Rev. 2.00 Sep. 07, 2007 Page 631 of 1312
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7
Section 14 Watchdog Timer (WDT)
Write data
Write data
REJ09B0320-0200
0
0