ORSPI4-2FTE1036I Lattice, ORSPI4-2FTE1036I Datasheet - Page 177
ORSPI4-2FTE1036I
Manufacturer Part Number
ORSPI4-2FTE1036I
Description
FPGA - Field Programmable Gate Array ORCA FPSC 1.5V SPI4 Interface
Manufacturer
Lattice
Datasheet
1.ORSPI4-2FTE1036I.pdf
(263 pages)
Specifications of ORSPI4-2FTE1036I
Product Category
FPGA - Field Programmable Gate Array
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
FPTBGA-1036
Minimum Operating Temperature
- 40 C
Factory Pack Quantity
60
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Lattice Semiconductor
Figure 88. Output Buffer Delays
Table 57. LVDS Driver AC Data
Termination Resistor
The LVDS drivers and receivers operate at 100
required. The differential driver and receiver buffers include termination resistors inside the device package, as shown in Figure
89 below. The center tap inputs should be connected to ground via a .01 pF capacitor.
Figure 89. SPI4 LVDS Driver and Receiver and Associated Internal Components
V
V
Differential Skew
|t
1. V
PHLA
OD
OD
DD
Fall Time, 80% to 20%
Rise Time, 20% to 80%
33 = 3.1V - 3.5 V, V
– t
PLHB
Parameter
| or |t
LVDS Driver
PHLB
out[i]
DD
15 = 1.4V - 1.6 V, -40˚C.
– t
PLHA
|
1
100Ω
ts[i]
Symbol
t
SKEW1
t
t
F
R
External Device Pins
PAD
PAD
OUT
OUT
Z
C
Z
C
Any differential pair on pack-
age at 50% point of the tran-
sition
Ω differential impedance, as shown below. External resistors are not
L
L
PAD
PAD
= 100 Ω ± 1%
= 100 Ω ± 1%
= 3.0 pF, C
= 3.0 pF, C
177
Test Conditions
Center Tap
3pF
PAD
PAD
= 3.0 pF
= 3.0 pF
50Ω
50Ω
3pF
LVDS Receiver
Min.
100
100
ORCA ORSPI4 Data Sheet
—
Typ.
—
—
—
Max.
210
210
50
Units
ps
ps
ps
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