ORSPI4-2FTE1036I Lattice, ORSPI4-2FTE1036I Datasheet - Page 60

• Manufacturer Part Number: ORSPI4-2FTE1036I
• Description: FPGA - Field Programmable Gate Array ORCA FPSC 1.5V SPI4 Interface
• Manufacturer: Lattice

Specifications of ORSPI4-2FTE1036I

• Product Category: FPGA - Field Programmable Gate Array
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: FPTBGA-1036
• Minimum Operating Temperature: - 40 C
• Factory Pack Quantity: 60

Lattice Semiconductor
Figure 21. Write Synchronization Sequence for 32-Bit Mode
SPI[A,B]_k_PORT_ID
SPI[A,B]_k_CLK_j
clock cycles before beginning of
Start 1
. . .
st
initial port cycle*
write no sooner than 6
. . .
BURST_VAL
for all ports
Set equal
1. If BURST_VAL worth of data is ready to be transmitted
2. Port status is not SATISFIED
3. Within valid time to load portís transmit FIFO as shown above
OK to load transmit FIFO with BURST_VAL of data for that port
1 port duration =
BURST_VAL
clock cycles
32-bit Mode (BURST_VAL = 4 example)
Port 0
Port 0, write 1
Conditions for writing to transmit FIFO:
Minimum Port Gap
Transmit Calendar
Range for Transmit FIFO writes
for 32-bit Mode
Port 0
Port 1
Port 2
Port 3
Port 0
.
.
.
.
60
Port 1
Port 0, write 2
* Rules valid for any value of
BURST_VAL in 32-bit mode
then
and
and
Port 2
port numbers in Transmit Calendar = 4 for
32-bit mode to allow time to load Transmit
Port 0, write 3
Each port in a minimum separation must
Minimum separation between repeating
FIFOs for data bursts of any length
be located in a different bank
ORCA ORSPI4 Data Sheet
Port 3
Port 0, write 4
than 2 clock cycles before
End last write no later
end of port cycle*
Port 0
burst read for
End of data
Port 0
. . .