ORSPI4-2FTE1036I Lattice, ORSPI4-2FTE1036I Datasheet - Page 26
ORSPI4-2FTE1036I
Manufacturer Part Number
ORSPI4-2FTE1036I
Description
FPGA - Field Programmable Gate Array ORCA FPSC 1.5V SPI4 Interface
Manufacturer
Lattice
Datasheet
1.ORSPI4-2FTE1036I.pdf
(263 pages)
Specifications of ORSPI4-2FTE1036I
Product Category
FPGA - Field Programmable Gate Array
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
FPTBGA-1036
Minimum Operating Temperature
- 40 C
Factory Pack Quantity
60
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Lattice Semiconductor
The bit ordering in the data format in the 128-bit aggregation mode is shown in Figure 9. The first byte of a packet
is always byte 0 of the 128-bit word. As shown in the figure, SOP is always aligned to the most significant 64-bit
Word 0 of a 2-word burst. SOP is always aligned to byte 0 of the 128-bit word.
Figure 9. Byte and Bit Ordering in 128-Bit Mode
127
Byte 0 Byte 1 Byte 2 Byte 3
SPI[A,B]_TX128_SOP
SPI[A,B]_RX128_SOP
119
111
103 96
95
Byte 4 Byte 5 Byte 6 Byte 7
87
79
SPI[A,B]_TX128_DATA[127:0] or
SPI[A,B]_RX128_DATA[127:0]
Time
Clock 1
71
Word 0
64
63
Byte 8 Byte 9 Byte 10 Byte 11
55
26
47
39
32
31
Byte12 Byte 13 Byte 14 Byte 15
23
15
ORCA ORSPI4 Data Sheet
FPGA
7
0
127
DPRAM
95 63
Word 0
31
0
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