ORSPI4-2FTE1036I Lattice, ORSPI4-2FTE1036I Datasheet - Page 178

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ORSPI4-2FTE1036I

Manufacturer Part Number
ORSPI4-2FTE1036I
Description
FPGA - Field Programmable Gate Array ORCA FPSC 1.5V SPI4 Interface
Manufacturer
Lattice
Datasheet

Specifications of ORSPI4-2FTE1036I

Product Category
FPGA - Field Programmable Gate Array
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
FPTBGA-1036
Minimum Operating Temperature
- 40 C
Factory Pack Quantity
60
Lattice Semiconductor
SPI4 AC Timing
Supported Data Rates
The SPI4 interfaces (SPIA and SPIB) on the ORSPI4 device support the following data rates
Table 58. Supported Data Rates
1 SPI[A,B]_TREFCLK_x8 internal signal is used in quarter-rate mode
SPI4.2 Data Interface
System Timing Reference Points
Figure 90 shows the system timing reference points A and B for the data path timing parameters for both the trans-
mit interface and the receive interface.
Figure 90. System Timing Reference Points.
Figure 91 defines the timing parameters t
the ORSPI4 transmit interface. Values of t
Figure 91. SPI4.2 Transmit Timing Points with Respect to Clock Edge
100 - 200 Mbps
500 -900 Mbps
500 -650 Mbps
Data Rate
TDCLK
TDAT
250 - 450 MHz
250 - 325 MHz
50 - 100 MHz
Frequency
(A)
Source
T
(DDR)
Clock
dia
T
Launch Edge
dib
dia
dia
62.5 - 112.5 MHz
62.5 - 81.25 MHz
and t
and t
100 - 200 MHz
A
Frequency
Transmit
REFCLK
dib
dib
TDAT[15:0] /
RDAT[15:0}
TCTL/RCTL
TDCLK/RDCLK
are given in Table 59.
which show the relationship of TDCLK to TDAT generated by
D
178
TDCLK
1
Dynamic
Static
Quarter-rate static mode
B
Recommended Operating Mode
Sink
ORCA ORSPI4 Data Sheet

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