ORSPI4-2FTE1036I Lattice, ORSPI4-2FTE1036I Datasheet - Page 203
ORSPI4-2FTE1036I
Manufacturer Part Number
ORSPI4-2FTE1036I
Description
FPGA - Field Programmable Gate Array ORCA FPSC 1.5V SPI4 Interface
Manufacturer
Lattice
Datasheet
1.ORSPI4-2FTE1036I.pdf
(263 pages)
Specifications of ORSPI4-2FTE1036I
Product Category
FPGA - Field Programmable Gate Array
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
FPTBGA-1036
Minimum Operating Temperature
- 40 C
Factory Pack Quantity
60
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Lattice Semiconductor
ORSPI4 Memory Controller External I/O Description
This section describes device I/O signals to/from the Memory Controller. Table 84 lists the external signals that
interface to the Memory Controller block.
Table 84. Memory Controller External Interface Signals
Interface to QDRII SDRAM
PMIK, PMIKN
PMID(35:0)
PMIA(17:0)
PMIWN
PMIRN
PMIC, PMICN
PMIQ(35:0)
REFCLK Source Inputs
MCREFCLK
ATREFCLK
BTREFCLK
Other Signals
EXT_1K
Pin Name
SDRAM Pin
SA(17:0)
CQ,CQ#
D(35:0)
Q(35:0)
QDRII
Name
K,K#
W#
R#
-
-
-
-
O = FPSC Output
I = FPSC Input
Direction
O
O
O
O
O
-
I
I
I
I
I
203
Clock for write data D, address SA, and enables W# and R#
Write data bus
Address bus
Write enable (active-LO)
Read enable (active-LO)
Clock for read data Q
Read data bus
Dedicated Memory Controller reference clock (HSTL)
SPIA reference clock (LVTTL). Note that this signal also is fed to
the SPIA block.
SPIB reference clock, (LVTTL). Note that this signal also is fed
to the SPIB block.
Reference resistor. Connect to a 1.5 K Ω ± 1% precision resistor
to ground. This current should handle a total of 700 μA.
Description
ORCA ORSPI4 Data Sheet
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