DK-DEV-3SL150N Altera, DK-DEV-3SL150N Datasheet - Page 151

• Manufacturer Part Number: DK-DEV-3SL150N
• Description: KIT DEVELOPMENT STRATIX III
• Manufacturer: Altera
• Series: Stratix® IIIr
• Type: FPGAr

Specifications of DK-DEV-3SL150N

• Contents: Development Platform, Cables and Software
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Silicon Core Number: EP3S
• Silicon Family Name: Stratix III
• Kit Contents: Development Board, Cable And Accessories
• Rohs Compliant: Yes
• For Use With/related Products: EP3SL150F152
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2568

Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
I/O Timing
Table 1–82. EP3SL200 Row Pins Input Timing Parameters (Part 3 of 3)
© July 2010 Altera Corporation
1.5-V HSTL
CLASS I
1.5-V HSTL
CLASS II
1.2-V HSTL
CLASS I
1.2-V HSTL
CLASS II
3.0-V PCI
3.0-V
PCI-X
Standard
I/O
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
GCLK
Clock
PLL
PLL
PLL
PLL
PLL
PLL
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
su
su
su
su
su
su
su
su
su
su
su
su
h
h
h
h
h
h
h
h
h
h
h
h
Industrial
-1.304
-0.632
-1.304
-0.632
-1.298
-0.638
-1.298
-0.638
-1.304
-0.632
-1.304
1.010
1.338
1.438
0.909
1.438
0.909
1.432
0.915
1.432
0.915
1.438
0.909
1.438
Fast Model
Commercial
-1.332
-0.632
-1.332
-0.632
-1.321
-0.643
-1.321
-0.643
-1.332
-0.632
-1.332
1.025
1.384
1.484
0.927
1.484
0.927
1.473
0.938
1.473
0.938
1.484
0.927
1.484
-1.969 -1.407 -1.654 -1.576 -1.475 -1.381 -1.551 -1.576 -1.475
-1.969
-1.972 -1.978 -2.368 -2.291 -2.712 -2.132 -2.388 -2.291 -2.712
-1.972 -1.978 -2.368 -2.291 -2.712 -2.132 -2.388 -2.291 -2.712
-1.972 -1.978 -2.368 -2.291 -2.712 -2.132 -2.388 -2.291 -2.712
-1.969 -1.979 -2.371 -2.294 -2.715 -2.131 -2.393 -2.294 -2.715
-1.969 -1.979 -2.371 -2.294 -2.715 -2.131 -2.393 -2.294 -2.715
-1.978 -1.992 -2.386 -2.309 -2.730 -2.140 -2.403 -2.309 -2.730
1.674
2.207
1.674
2.207
2.207
2.207
2.207
2.207
1.671
2.210
1.671
2.210
2.207
1.674
2.207
2.216
1.1 V
V
C2
CCL
=
-1.873 -2.118 -2.040 -2.463 -1.994 -2.144 -2.040 -2.463
-1.407 -1.654 -1.576 -1.475 -1.381 -1.551 -1.576 -1.475
-1.873 -2.118 -2.040 -2.463 -1.994 -2.144 -2.040 -2.463
-1.407 -1.654 -1.576 -1.475 -1.381 -1.551 -1.576 -1.475
-1.873 -2.118 -2.040 -2.463 -1.994 -2.144 -2.040 -2.463
2.117
1.902
2.117
1.902
1.862
2.223
1.862
2.223
2.224
1.861
2.224
2.237
1.1 V
V
C3
CCL
=
2.381
2.208
2.381
2.208
1.969
2.633
1.969
2.633
2.636
1.966
2.636
2.651
1.1 V
V
C4
CCL
=
2.289
2.098
2.289
2.098
1.850
2.541
1.850
2.541
2.544
1.847
2.544
2.559
1.1 V
V
CCL
=
C4L
2.713
2.007
2.713
2.007
1.775
2.966
1.775
2.966
2.969
1.772
2.969
2.984
0.9 V
V
CCL
Stratix III Device Handbook, Volume 2
=
2.244
1.889
2.244
1.889
1.751
2.384
1.751
2.384
2.383
1.752
2.383
2.392
1.1 V
V
I3
CCL
=
2.418
2.113
2.418
2.113
1.869
2.665
1.869
2.665
2.670
1.864
2.670
2.680
1.1 V
V
I4
CCL
=
2.289
2.098
2.289
2.098
1.850
2.541
1.850
2.541
2.544
1.847
2.544
2.559
1.1 V
V
CCL
1–151
=
I4L
2.713
2.007
2.713
2.007
1.775
2.966
1.775
2.966
2.969
1.772
2.969
2.984
0.9 V
V
CCL
=
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns