DK-DEV-3SL150N Altera, DK-DEV-3SL150N Datasheet - Page 329

• Manufacturer Part Number: DK-DEV-3SL150N
• Description: KIT DEVELOPMENT STRATIX III
• Manufacturer: Altera
• Series: Stratix® IIIr
• Type: FPGAr

Specifications of DK-DEV-3SL150N

• Contents: Development Platform, Cables and Software
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Silicon Core Number: EP3S
• Silicon Family Name: Stratix III
• Kit Contents: Development Board, Cable And Accessories
• Rohs Compliant: Yes
• For Use With/related Products: EP3SL150F152
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2568

Chapter 1: Stratix III Device Datasheet: DC and Switching Characteristics
Glossary
Table 1.
© July 2010 Altera Corporation
Glossary Table (Part 4 of 4)
Letter
W
V
X
Y
Z
V
V
V
V
V
V
V
Subject
D I F ( A C )
D I F ( D C )
C M ( D C )
V
V
I H ( A C )
I H ( D C )
I L ( A C )
I L ( D C )
V
V
V
V
O C M
—
—
—
I C M
W
O D
I D
I H
I L
DC Common Mode Input Voltage.
Input Common Mode Voltage: The common mode of the differential signal at the receiver.
Input Differential Voltage Swing: The difference in voltage between the positive and
complementary conductors of a differential transmission at the receiver.
AC Differential Input Voltage: Minimum AC input differential voltage required for switching.
DC Differential Input Voltage: Minimum DC input differential voltage required for switching.
Voltage Input High: The minimum positive voltage applied to the input that is accepted by the
device as a logic high.
High-level AC input voltage
High-level DC input voltage
Voltage Input Low: The maximum positive voltage applied to the input that is accepted by the
device as a logic low.
Low-level AC input voltage
Low-level DC input voltage
Output Common Mode Voltage: The common mode of the differential signal at the
transmitter.
Output differential Voltage Swing: The difference in voltage between the positive and
complementary conductors of a differential transmission at the transmitter.
High-Speed I/O Block: Clock Boost Factor
Definitions
—
—
—
Stratix III Device Handbook, Volume 2
1–329