MPC8544COMEDEV Freescale Semiconductor, MPC8544COMEDEV Datasheet - Page 1082

• Manufacturer Part Number: MPC8544COMEDEV
• Description: KIT DEV EXPRESS MPC8544COM
• Manufacturer: Freescale Semiconductor
• Type: MPUr

Specifications of MPC8544COMEDEV

• Contents: Board
• For Use With/related Products: MPC8544
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PCI Express Interface Controller
18-28
12–15
8–11
Bits
3–7
2
Table 18-22. PCI Express Inbound Window Attributes Registers Field Descriptions (continued)
Name
TRGT Target interface. If this field is set to anything other than local memory space, the attributes for the transaction
RTT
PF
—
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Prefetchable. This bit indicates that the address space is prefetchable. This bit corresponds to the
prefetchable bit in the BAR in the PCI Express type 0 header. This bit drives the BAR’s prefetchable bit in EP
mode.
0 Not prefetchable
1 Prefetchable
Reserved
must be assigned in a corresponding outbound window at the target.
0000 PCI
0001 PCI Express 2—PCI Express controller 2 should not use this encoding
0010 PCI Express 1—PCI Express controller 1 should not use this encoding
0011 PCI Express 3—PCI Express controller 3 should not use this encoding
0100-1110 Reserved
1111 Local memory space
Note: Inbound write transactions on one PCI Express port must not translate to outbound configuration or
Read transaction type. Read transaction type to send to target interface.
If the transaction is not going to local memory space
0000 Reserved
...
0100 Read
0101 Reserved
0110 Reserved
0111 Reserved
1000 Reserved
...
1111 Reserved
If the transaction is going to local memory space
0000 Reserved
...
0100 Read, don’t snoop local processor
0101 Read, snoop local processor
0110 Reserved
0111 Read, snoop local processor, unlock L2 cache line
1000 Reserved
...
1111 Reserved
I/O write transactions on another PCI Express port.
Description
Freescale Semiconductor