MPC8544COMEDEV Freescale Semiconductor, MPC8544COMEDEV Datasheet - Page 132

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MPC8544COMEDEV

Manufacturer Part Number
MPC8544COMEDEV
Description
KIT DEV EXPRESS MPC8544COM
Manufacturer
Freescale Semiconductor
Type
MPUr
Datasheets

Specifications of MPC8544COMEDEV

Contents
Board
For Use With/related Products
MPC8544
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Memory Map
2.2.3.6
If two local access windows overlap, the lower numbered window takes precedence. For instance, if two
windows are set up as shown in
region from 0x0_7FF0_0000 to 0x0_7FFF_FFF, even though the window described in local access
window 2 also encompasses that memory region.
2.2.3.7
Once a local access window is enabled, it should not be modified while any device in the system may be
using the window. Neither should a new window be used until the effect of the write to the window is
visible to all blocks that use the window. This can be guaranteed by completing a read of the last local
access window configuration register before enabling any other devices to use the window. For instance,
if local access windows 0–3 are being configured in order during the initialization process, the last write
(to LAWAR3) should be followed by a read of LAWAR3 before any devices try to use any of these
windows. If the configuration is being done by the local e500 processor, the read of LAWAR3 should be
followed by an isync instruction.
2-8
12–25
26–31
8–11
Bits
TRGT_ID
Name
SIZE
Precedence of Local Access Windows
Configuring Local Access Windows
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Window
Identifies the target interface ID when a transaction hits in the address range defined by this
window. Note that configuration registers and SRAM regions are mapped by the windows defined
by CCSRBAR and L2SRBAR. These mappings supersede local access window mappings, so
configuration registers and SRAM do not appear as a target for local access windows.
0000 PCI
0001 PCI Express 2
0010 PCI Express 1
0011 PCI Express 3
0100 Local bus memory controller
0101–1011Reserved
1100 Reserved
1101–1110Reserved
1111 DDR SDRAM
Write reserved, read = 0
Identifies the size of the window from the starting address. Window size is 2
000000–001010Reserved
001011 4 Kbytes
001100 8 Kbytes
00110116 Kbytes
. . . . . . . 2
100010 32 Gbytes
100011–111111Reserved
1
2
Table 2-8. LAWAR n Field Descriptions (continued)
Table 2-9. Overlapping Local Access Windows
(SIZE+1)
0x0_7FF0_0000
0x0_0000_0000
Base Address
Table
bytes
2-9, local access window 1 governs the mapping of the 1-Mbyte
2 Gbytes
1 Mbyte
Size
Description
0b0100 (Local bus controller —LBC)
0b1111 (DDR SDRAM)
Target Interface
Freescale Semiconductor
(SIZE+1)
bytes.

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