MPC8544COMEDEV Freescale Semiconductor, MPC8544COMEDEV Datasheet - Page 1249

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MPC8544COMEDEV

Manufacturer Part Number
MPC8544COMEDEV
Description
KIT DEV EXPRESS MPC8544COM
Manufacturer
Freescale Semiconductor
Type
MPUr
Datasheets

Specifications of MPC8544COMEDEV

Contents
Board
For Use With/related Products
MPC8544
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
21.3.2.2
The trace buffer address register (TBAR) shown in
TBCR0[AMD] is zero). This address may be further qualified by the mask bits defined in
“Trace Buffer Address Mask Register (TBAMR).”
Table 21-16
21.3.2.3
The trace buffer address mask register (TBAMR) shown in
which allows excluding address bits from the comparison.
Table 21-17
Freescale Semiconductor
Offset 0x04C
Reset
Offset 0x054
Reset
16–26
27–31
0–31
Bits
Bits
W
W
R
R
0
0
Name
TBAM Trace buffer address mask.A value of zero masks the address comparison for the corresponding address bit.
Name
TID
describes the TBAR field.
describes the TBAMR field.
Trace Buffer Address Register (TBAR)
Trace Buffer Address Mask Register (TBAMR)
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
0–31
Bits
These bits only mask the address bits generated by the hardware, but do not affect the bits specified in TBAR.
A bit that is masked from the comparison should be set to 0 in TBAR.
Reserved
Target ID. Specifies the target ID associated with TBCR0[TIDEN]. The target ID is defined in
Name
TBA
Figure 21-11. Trace Buffer Address Mask Register (TBAMR)
Figure 21-10. Trace Buffer Address Register (TBAR)
Trace buffer address.
Table 21-17. TBAMR Field Descriptions
Table 21-15. TBCR1 Field Descriptions
Table 21-16. TBAR Field Descriptions
Figure 21-10
All zeros
All zeros
TBAM
TBA
Description
Description
Description
Figure 21-11
contains the address to match against (if
contains a mask for the TBAR,
Debug Features and Watchpoint Facility
Section 21.3.2.3,
Access: Read/Write
Access: Read/Write
Table
21-26.
21-19
31
31

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