MPC8544COMEDEV Freescale Semiconductor, MPC8544COMEDEV Datasheet - Page 710

• Manufacturer Part Number: MPC8544COMEDEV
• Description: KIT DEV EXPRESS MPC8544COM
• Manufacturer: Freescale Semiconductor
• Type: MPUr

Specifications of MPC8544COMEDEV

• Contents: Board
• For Use With/related Products: MPC8544
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Local Bus Controller
Table 14-37
be programmed according to the device’s specific refresh requirements.
14.5.4.3.4
This example uses the same Micron SDRAM as in the previous example, but doubles the number of
devices connected and therefore uses two chip selects.
14.5.4.3.5
This example uses the MT48LC64M4A2FB from Micron to implement 512 Mbytes.
In this SDRAM organization:
The logical address is partitioned as shown in
The following parameters can be extracted:
14-90
•
•
•
•
The 32-bit port size is 8 × 4 × 64 Mbit × 2 chip select lines.
Each device has 4 internal banks, 13 row address lines, and 11 column address lines.
COLS = 100, 11 column lines
ROWS = 100, 13 row lines
shows the register configuration for this example. PSRT and MPTPR are not shown but should
msb of start address
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
256-Mbyte SDRAM
512-Mbyte SDRAM
A[0:3]
Table 14-37. Register Settings for 128-Mbyte SDRAMs
Register
LSDMR
OR n
BR n
Table 14-38. Logical Address Partitioning
A[4:16]
Row
ACTTOROW
PRETOACT
BUFCMD
ROWS
COLS
RFEN
BSMA
RFRC
Field
WRC
XAM
XBA
MS
AM
OP
BA
PS
CL
BL
V
Table
Bank select
A[17:18]
14-38.
11_1111_1000_0000_0000_0
011 = SDRAM-local bus
From device data sheet
From device data sheet
From device data sheet
From device data sheet
From device data sheet
11 = 32-bit port size
Ext. Base Address
Base address
Value
011
100
000
011
11
1
1
0
0
A[19:29]
Column
A[30:31]
Freescale Semiconductor
lsb