MPC8544COMEDEV Freescale Semiconductor, MPC8544COMEDEV Datasheet - Page 36

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MPC8544COMEDEV

Manufacturer Part Number
MPC8544COMEDEV
Description
KIT DEV EXPRESS MPC8544COM
Manufacturer
Freescale Semiconductor
Type
MPUr
Datasheets

Specifications of MPC8544COMEDEV

Contents
Board
For Use With/related Products
MPC8544
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Paragraph
Number
17.4.2.3.2
17.4.2.3.3
17.4.2.4
17.4.2.5
17.4.2.6
17.4.2.7
17.4.2.7.1
17.4.2.7.2
17.4.2.8
17.4.2.8.1
17.4.2.8.2
17.4.2.9
17.4.2.10
17.4.2.11
17.4.2.11.1
17.4.2.11.2
17.4.2.11.3
17.4.2.11.4
17.4.2.11.5
17.4.2.12
17.4.2.12.1
17.4.2.12.2
17.4.2.13
17.4.2.13.1
17.4.2.13.2
17.5
17.5.1
17.5.1.1
17.5.1.2
17.5.1.3
17.5.2
17.5.2.1
18.1
18.1.1
18.1.1.1
18.1.1.2
18.1.2
xxxvi
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Initialization/Application Information ......................................................................... 17-67
Introduction.................................................................................................................... 18-1
Power-On Reset Configuration Modes.................................................................... 17-67
Byte Ordering .......................................................................................................... 17-69
Overview.................................................................................................................... 18-1
Features...................................................................................................................... 18-3
Device Selection .................................................................................................. 17-48
Byte Alignment.................................................................................................... 17-49
Bus Driving and Turnaround ............................................................................... 17-49
PCI Bus Transactions........................................................................................... 17-50
Transaction Termination ...................................................................................... 17-52
Fast Back-to-Back Transactions .......................................................................... 17-56
Dual Address Cycles............................................................................................ 17-56
Configuration Cycles ........................................................................................... 17-58
Other Bus Transactions........................................................................................ 17-63
PCI Error Functions............................................................................................. 17-65
Host Mode ........................................................................................................... 17-68
Agent Mode ......................................................................................................... 17-68
Agent Configuration Lock Mode......................................................................... 17-68
Byte Order for Configuration Transactions ......................................................... 17-70
Outbound Transactions .......................................................................................... 18-2
Inbound Transactions............................................................................................. 18-3
I/O Space Addressing ...................................................................................... 17-48
Configuration Space Addressing ..................................................................... 17-48
PCI Read Transactions .................................................................................... 17-50
PCI Write Transactions.................................................................................... 17-51
Master-Initiated Termination ........................................................................... 17-52
Target-Initiated Termination ............................................................................ 17-53
PCI Configuration Space Header .................................................................... 17-58
Host Accessing the PCI Configuration Space ................................................. 17-60
Agent Accessing the PCI Configuration Space ............................................... 17-61
PCI Type 0 Configuration Translation............................................................. 17-62
Type 1 Configuration Translation.................................................................... 17-63
Interrupt-Acknowledge Transactions .............................................................. 17-63
Special-Cycle Transactions ............................................................................. 17-64
PCI Parity ........................................................................................................ 17-65
Error Reporting................................................................................................ 17-66
PCI Express Interface Controller
Contents
Chapter 18
Title
Freescale Semiconductor
Number
Page

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