MPC8544COMEDEV Freescale Semiconductor, MPC8544COMEDEV Datasheet - Page 360

Manufacturer Part Number

MPC8544COMEDEV

KIT DEV EXPRESS MPC8544COM

Manufacturer

Freescale Semiconductor

For Use With/related Products

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

DDR Memory Controller

ERR_DETECT is shown in

The memory error disable register, shown in

controller’s error detection circuitry. Disabled errors are not detected or reported.

Offset 0xE40

Offset 0xE44

describes the ERR_DETECT fields.

Memory Error Disable (ERR_DISABLE)

MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1

Multiple memory errors. This bit is cleared by software writing a 1.

0 Multiple memory errors of the same type were not detected.

1 Multiple memory errors of the same type were detected.

Automatic calibration error. This bit is cleared by software writing a 1.

0 An automatic calibration error has not been detected.

1 An automatic calibration error has been detected.

Multiple-bit error. This bit is cleared by software writing a 1.

0 A multiple-bit error has not been detected.

1 A multiple-bit error has been detected.

Single-bit ECC error. This bit is cleared by software writing a 1.

0 The number of single-bit ECC errors detected has not crossed the threshold set in ERR_SBE[SBET].

1 The number of single-bit ECC errors detected crossed the threshold set in ERR_SBE[SBET].

Memory select error. This bit is cleared by software writing a 1.

0 A memory select error has not been detected.

1 A memory select error has been detected.

Figure 9-27. Memory Error Disable Register (ERR_DISABLE)

Figure 9-26. Memory Error Detect Register (ERR_DETECT)

Table 9-31. ERR_DETECT Field Descriptions

9-27, allows selective disabling of the DDR

MBED SBED — MSED

Freescale Semiconductor

Access: Read/Write