MPC8544COMEDEV Freescale Semiconductor, MPC8544COMEDEV Datasheet - Page 210

• Manufacturer Part Number: MPC8544COMEDEV
• Description: KIT DEV EXPRESS MPC8544COM
• Manufacturer: Freescale Semiconductor
• Type: MPUr

Specifications of MPC8544COMEDEV

• Contents: Board
• For Use With/related Products: MPC8544
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Core Complex Overview
5.9.1
The core complex fetch and load/store units generate 32-bit effective addresses. The MMU translates these
addresses to real addresses (32-bit real addresses for the e500v1 core, 36-bit for the e500v2) (which are
used for memory bus accesses) using an interim 41-bit virtual address.
Figure 5-9
5-24
* Number of bits depends on page size (4 Kbytes–256 Mbytes).
Instruction Access
256-Entry 2-Way Set-Assoc. Array (TLB0)
16-Entry Fully-Assoc. VSP Array (TLB1)
shows the translation flow for the e500v1 core.
Address Translation
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
•••
L2 MMU (Unified)
Figure 5-9. Effective-to-Real Address Translation Flow
IS DS •••
Data Access
AS
32-Bit Real Address
MSR
8 Bits
PID0
PID2
PID1
4–20 Bits*
4–20 Bits*
Three 41-Bit Virtual Addresses (VAs)
Instruction L1 MMU
Effective Page Number
Real Page Number
2 TLBs
L1 MMUs
32-Bit Effective Address (EA)
Data L1 MMU
2 TLBs
12–28 Bits*
12–28 Bits*
Freescale Semiconductor
Byte Address
Byte Address