MPC8544COMEDEV Freescale Semiconductor, MPC8544COMEDEV Datasheet - Page 1118

Manufacturer Part Number

MPC8544COMEDEV

KIT DEV EXPRESS MPC8544COM

Manufacturer

Freescale Semiconductor

For Use With/related Products

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

PCI Express Interface Controller

18.3.8.3.16 PCI Express I/O Limit Upper 16 Bits Register—0x32

Note that this device does not support inbound I/O transactions. The I/O limit upper 16 bits register is

18.3.8.3.17 Capabilities Pointer Register—0x34

The capabilities pointer identifies additional functionality supported by the device.

Capabilities Pointer The capabilities pointer provides the offset (0x44) for additional PCI-compatible registers above the

I/O Limit Upper 16 Bits Specifies bits 31–16 of the I/O space ending address when the address decode type field

I/O Base Upper 16 Bits Specifies bits 31–16 of the I/O space start address when the address decode type field in

describes the I/O base upper 16 bits register fields.

describes the I/O limit upper 16 bits register fields.

MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1

Table 18-68. PCI Express I/O Base Upper 16 Bits Register Field Description

Table 18-69. PCI Express I/O Limit Upper 16 Bits Register Field Description

common 64-byte header. Refer to

Space,” for more information.

Table 18-70. Capabilities Pointer Register Field Description

Figure 18-73. PCI Express I/O Limit Upper 16 Bits Register

in the I/O limit register is 0x01.

the I/O base register is 0x01.

Figure 18-74. Capabilities Pointer Register

I/O Limit Upper 16 Bits

Capabilities Pointer

Section 18.3.9, “PCI Compatible Device-Specific Configuration

Freescale Semiconductor

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