DF2134AFA20V Renesas Electronics America, DF2134AFA20V Datasheet - Page 342

• Manufacturer Part Number: DF2134AFA20V
• Description: IC H8S/2100 MCU FLASH 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2134AFA20V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 58
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 80-QFP
• For Use With: 3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 11 16-Bit Free-Running Timer
Bit 1
OLVLA
0
1
Bit 0—Output Level B (OLVLB): Selects the logic level to be output at the FTOB pin in
response to compare-match B (signal indicating a match between the FRC and OCRB values).
Bit 0
OLVLB
0
1
11.2.10 Module Stop Control Register (MSTPCR)
MSTPCR, comprising two 8-bit readable/writable registers, performs module stop mode control.
When the MSTP13 bit is set to 1, FRT operation is stopped at the end of the bus cycle, and
module stop mode is entered. For details, see section 24.5, Module Stop Mode.
MSTPCR is initialized to H'3FFF by a reset and in hardware standby mode. It is not initialized in
software standby mode.
MSTPCRH Bit 5—Module Stop (MSTP13): Specifies the FRT module stop mode.
MSTPCRH
Bit 5
MSTP13
0
1
Rev. 4.00 Jun 06, 2006 page 286 of 1004
REJ09B0301-0400
Bit
Initial value
Read/Write
Description
0 output at compare-match A
1 output at compare-match A
Description
0 output at compare-match B
1 output at compare-match B
Description
FRT module stop mode is cleared
FRT module stop mode is set
MSTP15
R/W
7
0
MSTP14
R/W
6
0
MSTP13
R/W
5
1
MSTPCRH
MSTP12
R/W
4
1
MSTP11
R/W
3
1
MSTP10
R/W
2
1
MSTP9
R/W
1
1
MSTP8
R/W
0
1
MSTP7
R/W
7
1
MSTP6
R/W
6
1
MSTP5
R/W
5
1
MSTPCRL
MSTP4
R/W
4
1
MSTP3
R/W
3
1
MSTP2
R/W
2
1
(Initial value)
(Initial value)
(Initial value)
MSTP1
R/W
1
1
MSTP0
R/W
0
1