DF2134AFA20V Renesas Electronics America, DF2134AFA20V Datasheet - Page 533

• Manufacturer Part Number: DF2134AFA20V
• Description: IC H8S/2100 MCU FLASH 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2134AFA20V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 58
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 80-QFP
• For Use With: 3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Bit 5—I
(IRTR): Indicates that the I
source is completion of reception/transmission of one frame in continuous transmission/reception
for which DTC activation is possible. When the IRTR flag is set to 1, the IRIC flag is also set to 1
at the same time.
IRTR flag setting is performed when the TDRE or RDRF flag is set to 1. IRTR is cleared by
reading IRTR after it has been set to 1, then writing 0 in IRTR. IRTR is also cleared automatically
when the IRIC flag is cleared to 0.
Bit 4—Second Slave Address Recognition Flag (AASX): In I
this flag is set to 1 if the first frame following a start condition matches bits SVAX6 to SVAX0 in
SARX.
AASX is cleared by reading AASX after it has been set to 1, then writing 0 in AASX. AASX is
also cleared automatically when a start condition is detected.
Bit 5
IRTR
0
1
2
C Bus Interface Continuous Transmission/Reception Interrupt Request Flag
Description
Waiting for transfer, or transfer in progress
[Clearing conditions]
1. When 0 is written in IRTR after reading IRTR = 1
2. When the IRIC flag is cleared to 0
Continuous transfer state
[Setting conditions]
In I
When the TDRE or RDRF flag is set to 1 when AASX = 1
In other modes
When the TDRE or RDRF flag is set to 1
2
C bus interface slave mode
2
C bus interface has issued an interrupt request to the CPU, and the
Section 16 I
Rev. 4.00 Jun 06, 2006 page 477 of 1004
2
C Bus Interface [H8S/2138 Group Option]
2
C bus format slave receive mode,
REJ09B0301-0400
(Initial value)