DF2134AFA20V Renesas Electronics America, DF2134AFA20V Datasheet - Page 376

IC H8S/2100 MCU FLASH 80QFP

DF2134AFA20V

Manufacturer Part Number
DF2134AFA20V
Description
IC H8S/2100 MCU FLASH 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Datasheets

Specifications of DF2134AFA20V

Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
IrDA, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
58
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
80-QFP
For Use With
3DK2166 - DEV EVAL KIT H8S/2166
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DF2134AFA20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 12 8-Bit Timers
12.2.7
Only bit 1 is described here. For details on functions not related to the 8-bit timers, see sections
3.2.2 and 5.2.1, System Control Register (SYSCR), and the descriptions of the relevant modules.
Bit 1—Host Interface Enable (HIE): Controls CPU access to 8-bit timer (channel X and Y) data
registers and control registers, and timer connection control registers.
Bit 1
HIE
0
1
12.2.8
TCONRS is an 8-bit readable/writable register that controls access to the TMRX and TMRY
registers and timer connection operation.
TCONRS is initialized to H'00 by a reset and in hardware standby mode.
Rev. 4.00 Jun 06, 2006 page 320 of 1004
REJ09B0301-0400
Bit
Initial value
Read/Write
Bit
Initial value
Read/Write
System Control Register (SYSCR)
Timer Connection Register S (TCONRS)
Description
CPU access to 8-bit timer (channel X and Y) data registers and control registers, and
timer connection control registers, is enabled
CPU access to 8-bit timer (channel X and Y) data registers and control registers, and
timer connection control registers, is disabled
TMRX/Y
CS2E
R/W
R/W
7
0
7
0
ISGENE
IOSE
R/W
R/W
6
0
6
0
HOMOD1
INTM1
R/W
R
5
0
5
0
HOMOD0
INTM0
R/W
R/W
4
0
4
0
VOMOD1
XRST
R/W
R
3
1
3
0
VOMOD0
NMIEG
R/W
R/W
2
0
2
0
CLMOD1
R/W
R/W
HIE
1
0
1
0
(Initial value)
CLMOD0
RAME
R/W
R/W
0
1
0
0

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