DF2134AFA20V Renesas Electronics America, DF2134AFA20V Datasheet - Page 710

• Manufacturer Part Number: DF2134AFA20V
• Description: IC H8S/2100 MCU FLASH 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2134AFA20V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 58
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 80-QFP
• For Use With: 3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 22 ROM
22.9
All interrupts, including NMI input is disabled when flash memory is being programmed or erased
(when the P or E bit is set in FLMCR1), and while the boot program is executing in boot mode *
to give priority to the program or erase operation. There are three reasons for this:
1. Interrupt during programming or erasing might cause a violation of the programming or
2. In the interrupt exception handling sequence during programming or erasing, the vector would
3. If interrupt occurred during boot program execution, it would not be possible to execute the
For these reasons, in on-board programming mode alone there are conditions for disabling
interrupt, as an exception to the general rule. However, this provision does not guarantee normal
erasing and programming or MCU operation. All interrupt requests, including NMI input, must
therefore be disabled inside and outside the MCU when programming or erasing flash memory.
Interrupt is also disabled in the error-protection state while the P or E bit remains set in FLMCR1.
Notes: 1. Interrupt requests must be disabled inside and outside the MCU until the programming
Rev. 4.00 Jun 06, 2006 page 654 of 1004
REJ09B0301-0400
erasing algorithm, with the result that normal operation could not be assured.
not be read correctly *
normal boot mode sequence.
2. The vector may not be read correctly in this case for the following two reasons:
Interrupt Handling when Programming/Erasing Flash Memory
control program has completed programming.
•
•
If flash memory is read while being programmed or erased (while the P or E bit is
set in FLMCR1), correct read data will not be obtained (undetermined values will
be returned).
If the interrupt entry in the vector table has not been programmed yet, interrupt
exception handling will not be executed correctly.
(H8S/2138 F-ZTAT A-Mask Version, H8S/2134 F-ZTAT A-Mask Version)
2
, possibly resulting in MCU runaway.
1
,