DF2134AFA20V Renesas Electronics America, DF2134AFA20V Datasheet - Page 57

• Manufacturer Part Number: DF2134AFA20V
• Description: IC H8S/2100 MCU FLASH 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2134AFA20V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 58
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 80-QFP
• For Use With: 3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 1 Overview
Section 1 Overview
1.1
Overview
The H8S/2138 Group and H8S/2134 Group comprise microcomputers (MCUs) built around the
H8S/2000 CPU, employing Renesas Technology proprietary architecture, and equipped with
supporting modules on-chip.
The H8S/2000 CPU has an internal 32-bit architecture, is provided with sixteen 16-bit general
registers and a concise, optimized instruction set designed for high-speed operation, and can
address a 16-Mbyte linear address space. The instruction set is upward-compatible with H8/300
and H8/300H CPU instructions at the object-code level, facilitating migration from the H8/300,
H8/300L, or H8/300H Series.
On-chip supporting modules required for system configuration include a data transfer controller
(DTC) bus master, ROM and RAM, a 16-bit free-running timer module (FRT), 8-bit timer module
(TMR), watchdog timer module (WDT), two PWM timers (PWM and PWMX), serial
communication interface (SCI), host interface (HIF), D/A converter (DAC), A/D converter
2
(ADC), and I/O ports. An I
C bus interface (IIC) can also be incorporated as an option.
The on-chip ROM is either flash memory (F-ZTAT™ * ) or mask ROM, with a capacity of 128, 96,
64, or 32 kbytes. ROM is connected to the CPU via a 16-bit data bus, enabling both byte and word
data to be accessed in one state. Instruction fetching has been speeded up, and processing speed
increased.
Three operating modes, modes 1 to 3, are provided, and there is a choice of address space and
single-chip mode or externally expanded modes.
The features of the H8S/2138 Group and H8S/2134 Group are shown in table 1.1.
Note: * F-ZTAT is a trademark of Renesas Technology Corp.
Rev. 4.00 Jun 06, 2006 page 1 of 1004
REJ09B0301-0400