DF2134AFA20V Renesas Electronics America, DF2134AFA20V Datasheet - Page 693

• Manufacturer Part Number: DF2134AFA20V
• Description: IC H8S/2100 MCU FLASH 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2100r

Specifications of DF2134AFA20V

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: IrDA, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 58
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 80-QFP
• For Use With: 3DK2166 - DEV EVAL KIT H8S/2166
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

22.5.3
Notes: 1. In normal mode, these bits cannot be modified and are always read as 0.
EBR1 and EBR2 are registers that specify the flash memory erase area block by block; bits 1 and
0 in EBR1 and bits 7 to 0 in EBR2 are readable/writable bits. EBR1 and EBR2 are each initialized
to H'00 by a reset, in hardware standby mode, software standby mode, subactive mode, subsleep
mode, and watch mode, and when the SWE bit in FLMCR1 is not set. When a bit in EBR1 and
EBR2 is set, the corresponding block can be erased. Other blocks are erase-protected. Set only one
bit in EBR1 and EBR2 (more than one bit cannot be set). When on-chip flash memory is disabled,
a read will return H'00, and writes are invalid.
The flash memory block configuration is shown in table 22.5.
Bit
EBR1
Initial value
Read/Write
Bit
EBR2
Initial value
Read/Write
2. This bit must not be set to 1.
Erase Block Registers 1 and 2 (EBR1, EBR2)
Section 22 ROM
R/W *
EB7
— *
—
7
0
7
0
2
1
R/W
EB6
— *
—
6
0
6
0
2
(H8S/2138 F-ZTAT A-Mask Version, H8S/2134 F-ZTAT A-Mask Version)
EB5
R/W
— *
—
5
0
5
0
2
EB4
R/W
— *
—
4
0
4
0
2
Rev. 4.00 Jun 06, 2006 page 637 of 1004
EB3
R/W
— *
—
3
0
3
0
2
EB2
R/W
— *
—
2
0
2
0
2
REJ09B0301-0400
R/W *
EB9
EB1
R/W
1
0
1
0
1
R/W *
EB8
EB0
R/W
0
0
0
0
1