hi-6131pqtf QuickLogic Corp, hi-6131pqtf Datasheet - Page 105

• Manufacturer Part Number: hi-6131pqtf
• Description: Mil-std-1553 / Mil-std-1760 3.3v Bc / Mt / Rt Multi-terminal Device
• Manufacturer: QuickLogic Corp

13.4. SMT Next Message Command Stack Pointer (0x0030)
This 16-bit register is read-only and is updated by the MT upon completion of a monitored MIL-STD-1553 message.
This register is cleared after MR pin master reset or by MT soft reset, when the MTRESET bit is asserted in the Master
Status and Reset Register, 0x0001. This register contains the address for the first word to be stored in MT Command
Stack, for the next MIL-STD-1553 message. It mirrors the value contained in the MT Stack 1 Current Address Pointer,
which is Word 1 in the MT Address List.
The MT logic only updates this “next message address” register after message completion. Therefore, after reset or
after the host has changed the MT Address List Start Address Register 0x002F, this register does not contain a pointer
address until processing for the next message is completed. If the read value equals zero, the “next message address”
is the Command Stack starting address.
13.5. SMT Bus Monitor Time Tag Count Register (0x003A)
When MT Configuration Register bits 1-0 equal 11, the Simple Message Monitor operates with 16-bit Time Tag
resolution and register 0x003A contains the full 16-bit Time Tag count.
When MT Configuration Register bits 1-0 equal 01, the Simple Message Monitor operates with 48-bit Time Tag
resolution and the full Time Tag Count requires the above register plus two additional registers:
13.6. SMT Bus Monitor Time Tag Count Mid Register (0x003B)
13.7. SMT Bus Monitor Time Tag Count High Register (0x003C)
When configured for 48-bit time base operation, count bits 47-17 reside in register 0x003C, count bits 31-16 reside in
MSB
MSB
MSB
MSB
15 14 13 12 11 10
15 14 13 12 11 10
15 14 13 12 11 10
15 14 13 12 11 10
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Register Value
Register Value
Register Value
Register Value
0
9
0
9
0
9
0
9
0
8
0
8
0
8
0
8
RW
R
R
R
7
7
7
7
0
0
0
0
0
6
0
6
0
6
0
6
0
0
0
0
5
5
5
5
4
4
4
4
0
0
0
0
0
3
0
3
0
3
0
3
HOLT INTEGRATED CIRCUITS
0
0
0
0
2
2
2
2
HI-6130, HI-6131
0
1
0
1
0
1
0
1
LSB
LSB
LSB
LSB
0
0
0
0
0
0
0
0
MR Reset
Host Access
Bit
MR Reset
Host Access
Bit
MR Reset
Host Access
Bit
MR Reset
Host Access
Bit
105