hi-6131pqtf QuickLogic Corp, hi-6131pqtf Datasheet - Page 128

• Manufacturer Part Number: hi-6131pqtf
• Description: Mil-std-1553 / Mil-std-1760 3.3v Bc / Mt / Rt Multi-terminal Device
• Manufacturer: QuickLogic Corp

Bit No.
6 − 5
7
Mnemonic
PKTMR
MTSRR1:0
R/W
R/W
R/W
Reset
0
0
HOLT INTEGRATED CIRCUITS
Function
IMT Packet Timer Mode.
When the PKTMR bit is logic 0, the packet timer resets when the IMT
is enabled. The packet timer then starts counting when the next MIL-
STD-1553 message begins, at detection of the first valid command word
(or alternate Start-Record Requirement selected by bits 6-5 below.)
If the PKTMR bit is logic 1 when the IMT is enabled, the packet timer
resets then immediately starts when the IMT is enabled. In this mode,
whenever a data packet is finalized, the packet timer resets then
restarts, and new packet recording is immediately started. If enabled,
a PKTRDY (packet-ready) interrupt is generated for the host, at packet
completion.
IMT Start-Record Requirement 1:0.
When register bits 6-5 equal 00, the IMT starts recording a new
MIL-STD-1553 message when a properly encoded, complete MIL-
STD-1553 word with command sync is decoded: The command
sync is followed by 16 properly encoded data bits plus a 17th parity bit
expressing odd parity. No data is recorded until this condition is met.
This is the usual setting. (default setting)
When register bits 6-5 equal 01, the IMT starts recording a new
MIL-STD-1553 message when a properly encoded, complete MIL-
STD-1553 word with command sync or data sync is decoded. The
properly encoded command sync (or data sync) is followed by 16
properly encoded data bits plus a 17th parity bit expressing odd parity.
If recording begins with data sync, the Sync Error flag will be set in the
Block Status Word.
When register bits 6-5 equal 10, the IMT starts recording a new MIL-
STD-1553 message upon detection of a properly encoded command
sync with two contiguous data bits. If the properly encoded command
sync with two contiguous data bits does not result in a valid command
word, the Invalid Word Error is set in the Block Status Word. This
selection begins recording for complete MIL-STD-1553 command words
as well as for command word fragments, or command words with bad
parity. Under some circumstances, this record option might be helpful for
debugging MIL-STD-1553 communication failure.
When register bits 6-5 equal 11, the IMT starts recording new bus
activity upon detection of any properly encoded sync (command or
data) with two contiguous data bits. This selection begins recording
for complete MIL-STD-1553 command or data words as well as for
word fragments, or words with bad parity. If the properly encoded sync
with two contiguous data bits does not result in a valid Manchester II
word, the Invalid Word Error is set in the Block Status Word. If recording
begins with data sync, the Sync Error flag will be set in the Block Status
Word. Under some circumstances, this record option might be helpful for
debugging MIL-STD-1553 communication failure.
HI-6130, HI-6131
128